嵌入式Linux--I.MX6U--裸机--点亮LED

待我称王封你为后i 2022-12-02 10:45 199阅读 0赞

### 目录 ###

*  一、C语言运行环境构建
 *   *  1、设置处理器模式
     *  2、设置SP指针
     *  3、跳转到C语言
 *  二、编写C语言
 *  三、烧录到SD卡
 *  四、将头文件更新一下风格

# 一、C语言运行环境构建 #

## 1、设置处理器模式 ##

Cortex-A架构一共有9种处理模式：

<table> 
 <thead> 
  <tr> 
   <th align="left">模式</th> 
   <th align="left">描述</th> 
  </tr> 
 </thead> 
 <tbody> 
  <tr> 
   <td align="left">User(USR)</td> 
   <td align="left">用户模式，非特权模式，大部分程序运行的时候就处于此模式</td> 
  </tr> 
  <tr> 
   <td align="left">FIQ</td> 
   <td align="left">快速中断模式，进入FIQ中断异常</td> 
  </tr> 
  <tr> 
   <td align="left">IRQ</td> 
   <td align="left">一般中断模式</td> 
  </tr> 
  <tr> 
   <td align="left">Supervisor(SVC)</td> 
   <td align="left">超级管理员模式，特权模式，供操作系统使用</td> 
  </tr> 
  <tr> 
   <td align="left">Monitor(MON)</td> 
   <td align="left">监视模式，用于安全拓展模式</td> 
  </tr> 
  <tr> 
   <td align="left">Abort(ABT)</td> 
   <td align="left">数据访问终止模式，用于虚拟存储以及存储保护</td> 
  </tr> 
  <tr> 
   <td align="left">Hyp(HYP)</td> 
   <td align="left">超级监视模式，用于虚拟化拓展</td> 
  </tr> 
  <tr> 
   <td align="left">Undef(UND)</td> 
   <td align="left">未定义指令终止模式</td> 
  </tr> 
  <tr> 
   <td align="left">System(SYS)</td> 
   <td align="left">系统模式，用于运行特权级的操作系统任务</td> 
  </tr> 
 </tbody> 
</table>

设置处理处于SVC模式下，设置CPSR寄存器的bit4-0为10011=0x13。读写状态寄存器需要用到MRS和MSR指令。MRS将CPSR寄存器数据读出到通用寄存器里面，MSR指令将通用寄存器的值写入到CPSR寄存器里面去。

## 2、设置SP指针 ##

C语言运行的时候需要出栈和入栈，所以就需要SP指针，通过SP指针指向一段栈内存，但是SP指针可以指向内部RAM，也可以指向DDR，这里需要将它指向DDR。  
 DDR的范围，以512MB的DDR为例，它的地址范围是：0x80000000~0x9FFFFFFF，栈大小可以设为0x200000=2MB。A7处理器栈增长方式是向下增长的，所以SP就可以指向0x80200000。

## 3、跳转到C语言 ##

使用b指令，跳转到C语言，比如main函数。

# 二、编写C语言 #

main.c

#include "main.h"
    
    /* 使能外设时钟 */
    void clk_enable(void)
    { 
        CCM_CCGR1 = 0xFFFFFFFF;
        CCM_CCGR2 = 0xFFFFFFFF;
        CCM_CCGR4 = 0xFFFFFFFF;
        CCM_CCGR5 = 0xFFFFFFFF;
        CCM_CCGR6 = 0xFFFFFFFF;
    }
    
    /* 初始化LED */
    void led_init(void)
    { 
        SW_MUX_GPIO1_IO03 = 0X5; // 复用GPIO1_IO03
        SW_PAD_GPIO1_IO03 = 0x10B0; // 设置GPIO1_IO03电气属性
    
        // GPIO初始化
        GPIO1_GDIR = 0x8;  // 设置为输出
        GPIO1_DR   = 0x0;  // 打开LED
    }
    
    // 短延时
    void delay_short(volatile unsigned int n)
    { 
        while(n--);
    }
    
    // 延时，396MHz下一次循环大概是1ms
    void delay_ms(volatile unsigned int n)
    { 
        while(n--){ 
            delay_short(0x7ff);
        }
    }
    
    // 打开LED灯
    void led_on(void)
    { 
        GPIO1_DR &= ~(1<<3); // bit3清零
    }
    
    // 关闭LED灯
    void led_off(void)
    { 
        GPIO1_DR |= (1<<3); // bit3置1
    }
    
    int main(void)
    { 
        clk_enable();
        led_init();
    
        while(1)
        { 
            led_on();
            delay_ms(500);
    
            led_off();
            delay_ms(500);
        }
    
        return 0;
    }

main.h

#ifndef _MAIN_H
    #define _MAIN_H
    
    /* CCM相关寄存器地址 */
    #define CCM_CCGR0 *((volatile unsigned int *)0x020C4068)
    #define CCM_CCGR1 *((volatile unsigned int *)0x020C406C)
    #define CCM_CCGR2 *((volatile unsigned int *)0x020C4070)
    #define CCM_CCGR3 *((volatile unsigned int *)0x020C4074)
    #define CCM_CCGR4 *((volatile unsigned int *)0x020C4078)
    #define CCM_CCGR5 *((volatile unsigned int *)0x020C407C)
    #define CCM_CCGR6 *((volatile unsigned int *)0x020C4080)
    
    /* IOMUX相关寄存器地址 */
    #define SW_MUX_GPIO1_IO03 *((volatile unsigned int *)0x020E0068)
    #define SW_PAD_GPIO1_IO03 *((volatile unsigned int *)0x020E02F4)
    
    /* GPIO1相关寄存器地址 */
    #define GPIO1_DR *((volatile unsigned int *)0x0209C000)
    #define GPIO1_GDIR *((volatile unsigned int *)0x0209C004)
    #define GPIO1_PSR *((volatile unsigned int *)0x0209C008)
    #define GPIO1_ICR1 *((volatile unsigned int *)0x0209C00C)
    #define GPIO1_ICR2 *((volatile unsigned int *)0x0209C010)
    #define GPIO1_IMR *((volatile unsigned int *)0x0209C014)
    #define GPIO1_ISR *((volatile unsigned int *)0x0209C018)
    #define GPIO1_EDGE_SEL *((volatile unsigned int *)0x0209C01C)
    
    #endif

start.s

.global _start
    
    _start:
        /*设置处理器进入SVC模式 */
        mrs r0, cpsr       /*读取CPSR到r0 */
        bic r0, r0, #0x1f  /*清除CPSR的bit4~0 */
        orr r0, r0, #0x13  /*使用SVC模式 */
        msr cpsr, r0       /*将r0写入到CPSR */
    
        /*设置SP指针 */
        ldr sp, =0x80200000
        b main              /*跳转到C语言main函数 */

Makefile

objs = start.o main.o 
    
    ledc.bin : $(objs)
    	arm-linux-gnueabihf-ld -Ttext 87800000 $^ -o ledc.elf
    	arm-linux-gnueabihf-objcopy -O binary -S ledc.elf $@
    	arm-linux-gnueabihf-objdump -D -m arm ledc.elf > ledc.dis
    
    %.o : %.c
    	arm-linux-gnueabihf-gcc -Wall -nostdlib -c -o $@ $<
    
    %.o : %.s
    	arm-linux-gnueabihf-gcc -Wall -nostdlib -c -o $@ $<
    
    clean: 
    	rm -rf *.o ledc.bin ledc.elf ledc.dis

# 三、烧录到SD卡 #

*  检测SD卡：`ls /dev/sd*`
 *  编译代码：`make`
 *  清除工程：`make clean`
 *  烧录到SD卡：`./imxdownload ledc.bin /dev/sdb`

# 四、将头文件更新一下风格 #

main.h

/* * 外设寄存器组的基地址 */
    #define CCM_BASE (0X020C4000)
    #define CCM_ANALOG_BASE (0X020C8000)
    #define IOMUX_SW_MUX_BASE (0X020E0014)
    #define IOMUX_SW_PAD_BASE (0X020E0204)
    #define GPIO1_BASE (0x0209C000)
    #define GPIO2_BASE (0x020A0000)
    #define GPIO3_BASE (0x020A4000)
    #define GPIO4_BASE (0x020A8000)
    #define GPIO5_BASE (0x020AC000)
    
    /* * CCM寄存器结构体定义，分为CCM和CCM_ANALOG */
    typedef struct 
    { 
    	volatile unsigned int CCR;
    	volatile unsigned int CCDR;
    	volatile unsigned int CSR;
    	volatile unsigned int CCSR;
    	volatile unsigned int CACRR;
    	volatile unsigned int CBCDR;
    	volatile unsigned int CBCMR;
    	volatile unsigned int CSCMR1;
    	volatile unsigned int CSCMR2;
    	volatile unsigned int CSCDR1;
    	volatile unsigned int CS1CDR;
    	volatile unsigned int CS2CDR;
    	volatile unsigned int CDCDR;
    	volatile unsigned int CHSCCDR;
    	volatile unsigned int CSCDR2;
    	volatile unsigned int CSCDR3;	
    	volatile unsigned int RESERVED_1[2];
    	volatile unsigned int CDHIPR;  
    	volatile unsigned int RESERVED_2[2];
    	volatile unsigned int CLPCR;
    	volatile unsigned int CISR;
    	volatile unsigned int CIMR;
    	volatile unsigned int CCOSR;
    	volatile unsigned int CGPR;
    	volatile unsigned int CCGR0;
    	volatile unsigned int CCGR1;
    	volatile unsigned int CCGR2;
    	volatile unsigned int CCGR3;
    	volatile unsigned int CCGR4;
    	volatile unsigned int CCGR5;
    	volatile unsigned int CCGR6;
    	volatile unsigned int RESERVED_3[1];
    	volatile unsigned int CMEOR;	
    } CCM_Type; 
    
    typedef struct 
    { 
    	volatile unsigned int PLL_ARM;
    	volatile unsigned int PLL_ARM_SET;
    	volatile unsigned int PLL_ARM_CLR;
    	volatile unsigned int PLL_ARM_TOG;
    	volatile unsigned int PLL_USB1;
    	volatile unsigned int PLL_USB1_SET;
    	volatile unsigned int PLL_USB1_CLR;
    	volatile unsigned int PLL_USB1_TOG;
    	volatile unsigned int PLL_USB2;
    	volatile unsigned int PLL_USB2_SET;
    	volatile unsigned int PLL_USB2_CLR;
    	volatile unsigned int PLL_USB2_TOG;
    	volatile unsigned int PLL_SYS;
    	volatile unsigned int PLL_SYS_SET;
    	volatile unsigned int PLL_SYS_CLR;
    	volatile unsigned int PLL_SYS_TOG;
    	volatile unsigned int PLL_SYS_SS;
    	volatile unsigned int RESERVED_1[3];
    	volatile unsigned int PLL_SYS_NUM;
    	volatile unsigned int RESERVED_2[3];
    	volatile unsigned int PLL_SYS_DENOM; 
    	volatile unsigned int RESERVED_3[3];
    	volatile unsigned int PLL_AUDIO;
    	volatile unsigned int PLL_AUDIO_SET;
    	volatile unsigned int PLL_AUDIO_CLR;
    	volatile unsigned int PLL_AUDIO_TOG;
    	volatile unsigned int PLL_AUDIO_DENOM;
    	volatile unsigned int RESERVED_4[3];
    	volatile unsigned int PLL_VIDEO;
    	volatile unsigned int PLL_VIDEO_SET;
    	volatile unsigned int PLL_VIDEO_CLR;
    	volatile unsigned int PLL_VIDEO_TOG;
    	volatile unsigned int PLL_VIDEO_NUM;
    	volatile unsigned int RESERVED_5[3];
    	volatile unsigned int PLL_VIDEO_DENOM;
    	volatile unsigned int RESERVED_6[7];
    	volatile unsigned int PLL_ENET;
    	volatile unsigned int PLL_ENET_SET;
    	volatile unsigned int PLL_ENET_CLR;
    	volatile unsigned int PLL_ENET_TOG;
    	volatile unsigned int PFD_480;
    	volatile unsigned int PFD_480_SET;
    	volatile unsigned int PFD_480_CLR;
    	volatile unsigned int PFD_480_TOG;
    	volatile unsigned int PFD_528;
    	volatile unsigned int PFD_528_SET;
    	volatile unsigned int PFD_528_CLR;
    	volatile unsigned int PFD_528_TOG;
    	volatile unsigned int RESERVED_7[16];
    	volatile unsigned int MISC0;
    	volatile unsigned int MISC0_SET;
    	volatile unsigned int MISC0_CLR;
    	volatile unsigned int MISC0_TOG;
    	volatile unsigned int MISC1;
    	volatile unsigned int MISC1_SET;
    	volatile unsigned int MISC1_CLR;
    	volatile unsigned int MISC1_TOG;
    	volatile unsigned int MISC2;
    	volatile unsigned int MISC2_SET;
    	volatile unsigned int MISC2_CLR;
    	volatile unsigned int MISC2_TOG;
    } CCM_ANALOG_Type; 
    
    /* * IOMUX寄存器组 */
    typedef struct 
    { 
    	volatile unsigned int BOOT_MODE0;
    	volatile unsigned int BOOT_MODE1;
    	volatile unsigned int SNVS_TAMPER0;
    	volatile unsigned int SNVS_TAMPER1;
    	volatile unsigned int SNVS_TAMPER2;
    	volatile unsigned int SNVS_TAMPER3;
    	volatile unsigned int SNVS_TAMPER4;
    	volatile unsigned int SNVS_TAMPER5;
    	volatile unsigned int SNVS_TAMPER6;
    	volatile unsigned int SNVS_TAMPER7;
    	volatile unsigned int SNVS_TAMPER8;
    	volatile unsigned int SNVS_TAMPER9;
    	volatile unsigned int JTAG_MOD;
    	volatile unsigned int JTAG_TMS;
    	volatile unsigned int JTAG_TDO;
    	volatile unsigned int JTAG_TDI;
    	volatile unsigned int JTAG_TCK;
    	volatile unsigned int JTAG_TRST_B;
    	volatile unsigned int GPIO1_IO00;
    	volatile unsigned int GPIO1_IO01;
    	volatile unsigned int GPIO1_IO02;
    	volatile unsigned int GPIO1_IO03;
    	volatile unsigned int GPIO1_IO04;
    	volatile unsigned int GPIO1_IO05;
    	volatile unsigned int GPIO1_IO06;
    	volatile unsigned int GPIO1_IO07;
    	volatile unsigned int GPIO1_IO08;
    	volatile unsigned int GPIO1_IO09;
    	volatile unsigned int UART1_TX_DATA;
    	volatile unsigned int UART1_RX_DATA;
    	volatile unsigned int UART1_CTS_B;
    	volatile unsigned int UART1_RTS_B;
    	volatile unsigned int UART2_TX_DATA;
    	volatile unsigned int UART2_RX_DATA;
    	volatile unsigned int UART2_CTS_B;
    	volatile unsigned int UART2_RTS_B;
    	volatile unsigned int UART3_TX_DATA;
    	volatile unsigned int UART3_RX_DATA;
    	volatile unsigned int UART3_CTS_B;
    	volatile unsigned int UART3_RTS_B;
    	volatile unsigned int UART4_TX_DATA;
    	volatile unsigned int UART4_RX_DATA;
    	volatile unsigned int UART5_TX_DATA;
    	volatile unsigned int UART5_RX_DATA;
    	volatile unsigned int ENET1_RX_DATA0;
    	volatile unsigned int ENET1_RX_DATA1;
    	volatile unsigned int ENET1_RX_EN;
    	volatile unsigned int ENET1_TX_DATA0;
    	volatile unsigned int ENET1_TX_DATA1;
    	volatile unsigned int ENET1_TX_EN;
    	volatile unsigned int ENET1_TX_CLK;
    	volatile unsigned int ENET1_RX_ER;
    	volatile unsigned int ENET2_RX_DATA0;
    	volatile unsigned int ENET2_RX_DATA1;
    	volatile unsigned int ENET2_RX_EN;
    	volatile unsigned int ENET2_TX_DATA0;
    	volatile unsigned int ENET2_TX_DATA1;
    	volatile unsigned int ENET2_TX_EN;
    	volatile unsigned int ENET2_TX_CLK;
    	volatile unsigned int ENET2_RX_ER;
    	volatile unsigned int LCD_CLK;
    	volatile unsigned int LCD_ENABLE;
    	volatile unsigned int LCD_HSYNC;
    	volatile unsigned int LCD_VSYNC;
    	volatile unsigned int LCD_RESET;
    	volatile unsigned int LCD_DATA00;
    	volatile unsigned int LCD_DATA01;
    	volatile unsigned int LCD_DATA02;
    	volatile unsigned int LCD_DATA03;
    	volatile unsigned int LCD_DATA04;
    	volatile unsigned int LCD_DATA05;
    	volatile unsigned int LCD_DATA06;
    	volatile unsigned int LCD_DATA07;
    	volatile unsigned int LCD_DATA08;
    	volatile unsigned int LCD_DATA09;
    	volatile unsigned int LCD_DATA10;
    	volatile unsigned int LCD_DATA11;
    	volatile unsigned int LCD_DATA12;
    	volatile unsigned int LCD_DATA13;
    	volatile unsigned int LCD_DATA14;
    	volatile unsigned int LCD_DATA15;
    	volatile unsigned int LCD_DATA16;
    	volatile unsigned int LCD_DATA17;
    	volatile unsigned int LCD_DATA18;
    	volatile unsigned int LCD_DATA19;
    	volatile unsigned int LCD_DATA20;
    	volatile unsigned int LCD_DATA21;
    	volatile unsigned int LCD_DATA22;
    	volatile unsigned int LCD_DATA23;
    	volatile unsigned int NAND_RE_B;
    	volatile unsigned int NAND_WE_B;
    	volatile unsigned int NAND_DATA00;
    	volatile unsigned int NAND_DATA01;
    	volatile unsigned int NAND_DATA02;
    	volatile unsigned int NAND_DATA03;
    	volatile unsigned int NAND_DATA04;
    	volatile unsigned int NAND_DATA05;
    	volatile unsigned int NAND_DATA06;
    	volatile unsigned int NAND_DATA07;
    	volatile unsigned int NAND_ALE;
    	volatile unsigned int NAND_WP_B;
    	volatile unsigned int NAND_READY_B;
    	volatile unsigned int NAND_CE0_B;
    	volatile unsigned int NAND_CE1_B;
    	volatile unsigned int NAND_CLE;
    	volatile unsigned int NAND_DQS;
    	volatile unsigned int SD1_CMD;
    	volatile unsigned int SD1_CLK;
    	volatile unsigned int SD1_DATA0;
    	volatile unsigned int SD1_DATA1;
    	volatile unsigned int SD1_DATA2;
    	volatile unsigned int SD1_DATA3;
    	volatile unsigned int CSI_MCLK;
    	volatile unsigned int CSI_PIXCLK;
    	volatile unsigned int CSI_VSYNC;
    	volatile unsigned int CSI_HSYNC;
    	volatile unsigned int CSI_DATA00;
    	volatile unsigned int CSI_DATA01;
    	volatile unsigned int CSI_DATA02;
    	volatile unsigned int CSI_DATA03;
    	volatile unsigned int CSI_DATA04;
    	volatile unsigned int CSI_DATA05;
    	volatile unsigned int CSI_DATA06;
    	volatile unsigned int CSI_DATA07;
    }IOMUX_SW_MUX_Type;
    
    typedef struct 
    { 
    	volatile unsigned int DRAM_ADDR00;
    	volatile unsigned int DRAM_ADDR01;
    	volatile unsigned int DRAM_ADDR02;
    	volatile unsigned int DRAM_ADDR03;
    	volatile unsigned int DRAM_ADDR04;
    	volatile unsigned int DRAM_ADDR05;
    	volatile unsigned int DRAM_ADDR06;
    	volatile unsigned int DRAM_ADDR07;
    	volatile unsigned int DRAM_ADDR08;
    	volatile unsigned int DRAM_ADDR09;
    	volatile unsigned int DRAM_ADDR10;
    	volatile unsigned int DRAM_ADDR11;
    	volatile unsigned int DRAM_ADDR12;
    	volatile unsigned int DRAM_ADDR13;
    	volatile unsigned int DRAM_ADDR14;
    	volatile unsigned int DRAM_ADDR15;
    	volatile unsigned int DRAM_DQM0;
    	volatile unsigned int DRAM_DQM1;
    	volatile unsigned int DRAM_RAS_B;
    	volatile unsigned int DRAM_CAS_B;
    	volatile unsigned int DRAM_CS0_B;
    	volatile unsigned int DRAM_CS1_B;
    	volatile unsigned int DRAM_SDWE_B;
    	volatile unsigned int DRAM_ODT0;
    	volatile unsigned int DRAM_ODT1;
    	volatile unsigned int DRAM_SDBA0;
    	volatile unsigned int DRAM_SDBA1;
    	volatile unsigned int DRAM_SDBA2;
    	volatile unsigned int DRAM_SDCKE0;
    	volatile unsigned int DRAM_SDCKE1;
    	volatile unsigned int DRAM_SDCLK0_P;
    	volatile unsigned int DRAM_SDQS0_P;
    	volatile unsigned int DRAM_SDQS1_P;
    	volatile unsigned int DRAM_RESET;
    	volatile unsigned int TEST_MODE;
    	volatile unsigned int POR_B;
    	volatile unsigned int ONOFF;
    	volatile unsigned int SNVS_PMIC_ON_REQ;
    	volatile unsigned int CCM_PMIC_STBY_REQ;
    	volatile unsigned int BOOT_MODE0;
    	volatile unsigned int BOOT_MODE1;
    	volatile unsigned int SNVS_TAMPER0;
    	volatile unsigned int SNVS_TAMPER1;
    	volatile unsigned int SNVS_TAMPER2;
    	volatile unsigned int SNVS_TAMPER3;
    	volatile unsigned int SNVS_TAMPER4;
    	volatile unsigned int SNVS_TAMPER5;
    	volatile unsigned int SNVS_TAMPER6;
    	volatile unsigned int SNVS_TAMPER7;
    	volatile unsigned int SNVS_TAMPER8;
    	volatile unsigned int SNVS_TAMPER9;
    	volatile unsigned int JTAG_MOD;
    	volatile unsigned int JTAG_TMS;
    	volatile unsigned int JTAG_TDO;
    	volatile unsigned int JTAG_TDI;
    	volatile unsigned int JTAG_TCK;
    	volatile unsigned int JTAG_TRST_B;
    	volatile unsigned int GPIO1_IO00;
    	volatile unsigned int GPIO1_IO01;
    	volatile unsigned int GPIO1_IO02;
    	volatile unsigned int GPIO1_IO03;
    	volatile unsigned int GPIO1_IO04;
    	volatile unsigned int GPIO1_IO05;
    	volatile unsigned int GPIO1_IO06;
    	volatile unsigned int GPIO1_IO07;
    	volatile unsigned int GPIO1_IO08;
    	volatile unsigned int GPIO1_IO09;
    	volatile unsigned int UART1_TX_DATA;
    	volatile unsigned int UART1_RX_DATA;
    	volatile unsigned int UART1_CTS_B;
    	volatile unsigned int UART1_RTS_B;
    	volatile unsigned int UART2_TX_DATA;
    	volatile unsigned int UART2_RX_DATA;
    	volatile unsigned int UART2_CTS_B;
    	volatile unsigned int UART2_RTS_B;
    	volatile unsigned int UART3_TX_DATA;
    	volatile unsigned int UART3_RX_DATA;
    	volatile unsigned int UART3_CTS_B;
    	volatile unsigned int UART3_RTS_B;
    	volatile unsigned int UART4_TX_DATA;
    	volatile unsigned int UART4_RX_DATA;
    	volatile unsigned int UART5_TX_DATA;
    	volatile unsigned int UART5_RX_DATA;
    	volatile unsigned int ENET1_RX_DATA0;
    	volatile unsigned int ENET1_RX_DATA1;
    	volatile unsigned int ENET1_RX_EN;
    	volatile unsigned int ENET1_TX_DATA0;
    	volatile unsigned int ENET1_TX_DATA1;
    	volatile unsigned int ENET1_TX_EN;
    	volatile unsigned int ENET1_TX_CLK;
    	volatile unsigned int ENET1_RX_ER;
    	volatile unsigned int ENET2_RX_DATA0;
    	volatile unsigned int ENET2_RX_DATA1;
    	volatile unsigned int ENET2_RX_EN;
    	volatile unsigned int ENET2_TX_DATA0;
    	volatile unsigned int ENET2_TX_DATA1;
    	volatile unsigned int ENET2_TX_EN;
    	volatile unsigned int ENET2_TX_CLK;
    	volatile unsigned int ENET2_RX_ER;
    	volatile unsigned int LCD_CLK;
    	volatile unsigned int LCD_ENABLE;
    	volatile unsigned int LCD_HSYNC;
    	volatile unsigned int LCD_VSYNC;
    	volatile unsigned int LCD_RESET;
    	volatile unsigned int LCD_DATA00;
    	volatile unsigned int LCD_DATA01;
    	volatile unsigned int LCD_DATA02;
    	volatile unsigned int LCD_DATA03;
    	volatile unsigned int LCD_DATA04;
    	volatile unsigned int LCD_DATA05;
    	volatile unsigned int LCD_DATA06;
    	volatile unsigned int LCD_DATA07;
    	volatile unsigned int LCD_DATA08;
    	volatile unsigned int LCD_DATA09;
    	volatile unsigned int LCD_DATA10;
    	volatile unsigned int LCD_DATA11;
    	volatile unsigned int LCD_DATA12;
    	volatile unsigned int LCD_DATA13;
    	volatile unsigned int LCD_DATA14;
    	volatile unsigned int LCD_DATA15;
    	volatile unsigned int LCD_DATA16;
    	volatile unsigned int LCD_DATA17;
    	volatile unsigned int LCD_DATA18;
    	volatile unsigned int LCD_DATA19;
    	volatile unsigned int LCD_DATA20;
    	volatile unsigned int LCD_DATA21;
    	volatile unsigned int LCD_DATA22;
    	volatile unsigned int LCD_DATA23;
    	volatile unsigned int NAND_RE_B;
    	volatile unsigned int NAND_WE_B;
    	volatile unsigned int NAND_DATA00;
    	volatile unsigned int NAND_DATA01;
    	volatile unsigned int NAND_DATA02;
    	volatile unsigned int NAND_DATA03;
    	volatile unsigned int NAND_DATA04;
    	volatile unsigned int NAND_DATA05;
    	volatile unsigned int NAND_DATA06;
    	volatile unsigned int NAND_DATA07;
    	volatile unsigned int NAND_ALE;
    	volatile unsigned int NAND_WP_B;
    	volatile unsigned int NAND_READY_B;
    	volatile unsigned int NAND_CE0_B;
    	volatile unsigned int NAND_CE1_B;
    	volatile unsigned int NAND_CLE;
    	volatile unsigned int NAND_DQS;
    	volatile unsigned int SD1_CMD;
    	volatile unsigned int SD1_CLK;
    	volatile unsigned int SD1_DATA0;
    	volatile unsigned int SD1_DATA1;
    	volatile unsigned int SD1_DATA2;
    	volatile unsigned int SD1_DATA3;
    	volatile unsigned int CSI_MCLK;
    	volatile unsigned int CSI_PIXCLK;
    	volatile unsigned int CSI_VSYNC;
    	volatile unsigned int CSI_HSYNC;
    	volatile unsigned int CSI_DATA00;
    	volatile unsigned int CSI_DATA01;
    	volatile unsigned int CSI_DATA02;
    	volatile unsigned int CSI_DATA03;
    	volatile unsigned int CSI_DATA04;
    	volatile unsigned int CSI_DATA05;
    	volatile unsigned int CSI_DATA06;
    	volatile unsigned int CSI_DATA07;
    	volatile unsigned int GRP_ADDDS;
    	volatile unsigned int GRP_DDRMODE_CTL;
    	volatile unsigned int GRP_B0DS;
    	volatile unsigned int GRP_DDRPK;
    	volatile unsigned int GRP_CTLDS;
    	volatile unsigned int GRP_B1DS;
    	volatile unsigned int GRP_DDRHYS;
    	volatile unsigned int GRP_DDRPKE;
    	volatile unsigned int GRP_DDRMODE;
    	volatile unsigned int GRP_DDR_TYPE;
    }IOMUX_SW_PAD_Type;
    
    /* * GPIO寄存器结构体 */
    typedef struct 
    { 
    	volatile unsigned int DR;							
    	volatile unsigned int GDIR; 							
    	volatile unsigned int PSR;								
    	volatile unsigned int ICR1; 							
    	volatile unsigned int ICR2; 							 
    	volatile unsigned int IMR;								 
    	volatile unsigned int ISR;			
    	volatile unsigned int EDGE_SEL;  
    }GPIO_Type;
    
    
    /* * 外设指针 */
    #define CCM ((CCM_Type *)CCM_BASE)
    #define CCM_ANALOG ((CCM_ANALOG_Type *)CCM_ANALOG_BASE)
    #define IOMUX_SW_MUX ((IOMUX_SW_MUX_Type *)IOMUX_SW_MUX_BASE)
    #define IOMUX_SW_PAD ((IOMUX_SW_PAD_Type *)IOMUX_SW_PAD_BASE)
    #define GPIO1 ((GPIO_Type *)GPIO1_BASE)
    #define GPIO2 ((GPIO_Type *)GPIO2_BASE)
    #define GPIO3 ((GPIO_Type *)GPIO3_BASE)
    #define GPIO4 ((GPIO_Type *)GPIO4_BASE)
    #define GPIO5 ((GPIO_Type *)GPIO5_BASE)