AXD 的使用以及源代码说明

Dear 丶 2021-11-16 12:24 314阅读 0赞

汇编源代码说明

;===============================================================================

; 引用头文件

;===============================================================================

get bdinit.h

;===============================================================================

; 引用标准变量

;===============================================================================

<table> 
 <tbody> 
 <tr> 
 <td> IMPORT </td> 
 <td> |Image$$RO$$Base| </td> 
 <td> ; Base address of RO section </td> 
 </tr> 
 <tr> 
 <td> IMPORT </td> 
 <td> |Image$$RO$$Limit| </td> 
 <td> ; End address of RO section </td> 
 </tr> 
 <tr> 
 <td> IMPORT </td> 
 <td> |Image$$RW$$Base| </td> 
 <td> ; Base address of RW section </td> 
 </tr> 
 <tr> 
 <td> IMPORT </td> 
 <td> |Image$$RW$$Limit| </td> 
 <td> ; End address of RW section </td> 
 </tr> 
 <tr> 
 <td> IMPORT </td> 
 <td> |Image$$ZI$$Base| </td> 
 <td> ; Base address of ZI section </td> 
 </tr> 
 <tr> 
 <td> IMPORT </td> 
 <td> |Image$$ZI$$Limit| </td> 
 <td> ; End addresss of ZI section </td> 
 </tr> 
 </tbody> 
</table>

IMPORT bdmain ; The entry function of C program

;===============================================================================

; 宏定义

;===============================================================================

; macro HANDLER

MACRO

$HandlerLabel HANDLER $HandleLabel

$HandlerLabel

sub sp,sp,\#4 ;Decrement sp (to store jump address) stmfd sp!,\{r0\} ;PUSH the work register to stack

ldr r0,=$HandleLabel;Load the address of HandleXXX to r0

ldr r0,\[r0\] ;Load the contents(service routine start address) of HandleXXX str r0,\[sp,\#4\] ;Store the contents(ISR) of HandleXXX to stack

ldmfd sp!,\{r0,pc\} ;POP the work register and pc(jump to ISR) MEND

;===============================================================================

; 汇编语言的入口代码

;===============================================================================

AREA Init,CODE,READONLY CODE32

ENTRY

;=====================

; 建立中断向量表

;=====================

<table> 
 <tbody> 
 <tr> 
 <td> b </td> 
 <td> reset_handler </td> 
 <td> ;0x00000000: </td> 
 <td> Reset (SVC) </td> 
 </tr> 
 <tr> 
 <td> b </td> 
 <td> undef_handler </td> 
 <td> ;0x00000004: </td> 
 <td> Undefined instruction (Undef) </td> 
 </tr> 
 <tr> 
 <td> b </td> 
 <td> swi_handler </td> 
 <td> ;0x00000008: </td> 
 <td> Software Interrupt (SVC) </td> 
 </tr> 
 <tr> 
 <td> b </td> 
 <td> iabr_handler </td> 
 <td> ;0x0000000C: </td> 
 <td> Instruction Abort (Abort) </td> 
 </tr> 
 <tr> 
 <td> b </td> 
 <td> dabr_handler </td> 
 <td> ;0x00000010: </td> 
 <td> Data Abort (Abort) </td> 
 </tr> 
 <tr> 
 <td> b </td> 
 <td> no_handler </td> 
 <td> ;0x00000014: </td> 
 <td> &nbsp; </td> 
 </tr> 
 <tr> 
 <td> b </td> 
 <td> irq_handler </td> 
 <td> ;0x00000018: </td> 
 <td> IRQ (IRQ) </td> 
 </tr> 
 <tr> 
 <td> b </td> 
 <td> fiq_handler </td> 
 <td> ;0x0000001C: </td> 
 <td> FIQ (FIQ) </td> 
 </tr> 
 </tbody> 
</table>

LTORG

undef\_handler HANDLER HandleUndef swi\_handler HANDLER HandleSWI iabr\_handler HANDLER HandlePabort dabr\_handler HANDLER HandleDabort no\_handler HANDLER HandleReserved irq\_handler HANDLER HandleIRQ fiq\_handler HANDLER HandleFIQ

;=============================

; 复位时运行的主程序

;=============================

reset\_handler

;Set the cpu to SVC32 mode mrs r0,cpsr

bic r0,r0,\#0x1f

orr r0,r0,\#0xd3

msr cpsr\_cxsf,r0

;Turn off watchdog ldr r0,=WTCON

ldr r1,=0x0

str r1,\[r0\]

;Disable all the first level interrupts ldr r0,=INTMSK

ldr r1,=0xffffffff str r1,\[r0\]

;Disable all the second level interrupts ldr r0,=INTSUBMSK

ldr r1,=0x7ff

str r1,\[r0\]

;Configure MPLL ldr r0,=MPLLCON

ldr r1,=((M\_MDIV<<12)+(M\_PDIV<<4)+M\_SDIV) ;Fin=12MHz,Fout=200MHz

str r1,\[r0\]

;Set FCLK:HCLK:PCLK = 1:2:4 ldr r0, =CLKDIVN

mov r1, \#3

str r1, \[r0\]

;Set memory control registers ldr r0,=SMRDATA

<table> 
 <tbody> 
 <tr> 
 <td> &nbsp; </td> 
 <td> ldr </td> 
 <td> r1,=BWSCON </td> 
 </tr> 
 <tr> 
 <td> add </td> 
 <td> r2, r0, #52&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ;End address of SMRDATA </td> 
 </tr> 
 <tr> 
 <td> 0 </td> 
 <td> &nbsp; </td> 
 <td> &nbsp; </td> 
 </tr> 
 <tr> 
 <td> &nbsp; </td> 
 <td> ldr </td> 
 <td> r3, [r0], #4 </td> 
 </tr> 
 <tr> 
 <td> &nbsp; </td> 
 <td> str </td> 
 <td> r3, [r1], #4 </td> 
 </tr> 
 <tr> 
 <td> &nbsp; </td> 
 <td> cmp </td> 
 <td> r2, r0 </td> 
 </tr> 
 <tr> 
 <td> &nbsp; </td> 
 <td> bne </td> 
 <td> %B0 </td> 
 </tr> 
 </tbody> 
</table>

;Initialize stacks bl InitStacks

;Setup IRQ handler

ldr r0,=HandleIRQ ;This routine is needed ldr r1,=IsrIRQ

str r1,\[r0\]

;Copy RW/ZI section into RAM

ldr r0, =|Image$$RO$$Limit|;Get pointer to ROM data ldr r1, =|Image$$RW$$Base| ;and RAM copy

ldr r3, =|Image$$ZI$$Base|

cmp r0, r1 ; Check that they are different beq %F2

cmp r1, r3 ; Copy init data

ldrcc r2, \[r0\], \#4 ;--> LDRCC r2, \[r0\] + ADD r0, r0, \#4 strcc r2, \[r1\], \#4 ;--> STRCC r2, \[r1\] + ADD r1, r1, \#4

bcc %B1

ldr r1, =|Image$$ZI$$Limit| ; Top of zero init segment mov r2, \#0

cmp r3, r1 ; Zero init strcc r2, \[r3\], \#4

bcc %B3

bl bdmain ;Jump to the main function

;Dead loop

nop

b %B1

;===============================================================================

; 初始中断处理程序

;===============================================================================

IsrIRQ

sub sp,sp,\#4 ;reserved for PC stmfd sp!,\{r8-r9\}

ldr r9,=INTOFFSET

ldr r9,\[r9\]

ldr r8,=HandleEINT0 add r8,r8,r9,lsl \#2 ldr r8,\[r8\]

str r8,\[sp,\#8\] ldmfd sp!,\{r8-r9,pc\}

;===============================================================================

; 初始化各个模式下堆栈

;===============================================================================

InitStacks

mrs r0,cpsr

bic r0,r0,\#MODEMASK

orr r1,r0,\#UNDEFMODE|NOINT

msr cpsr\_cxsf,r1 ;UndefMode ldr sp,=UndefStack

orr r1,r0,\#ABORTMODE|NOINT

msr cpsr\_cxsf,r1 ;AbortMode ldr sp,=AbortStack

orr r1,r0,\#IRQMODE|NOINT

msr cpsr\_cxsf,r1 ;IRQMode ldr sp,=IRQStack

orr r1,r0,\#FIQMODE|NOINT

msr cpsr\_cxsf,r1 ;FIQMode ldr sp,=FIQStack

bic r0,r0,\#MODEMASK|NOINT orr r1,r0,\#SVCMODE

msr cpsr\_cxsf,r1 ;SVCMode ldr sp,=SVCStack

mov pc,lr ;Return the call routine LTORG

;===============================================================================

; 内存区控制寄存器值表; 你可根据需要修改 bdinit.h 文件, 下面代码不用做任何改动

;===============================================================================

SMRDATA DATA

DCD (0+(B1\_BWSCON<<4)+(B2\_BWSCON<<8)+(B3\_BWSCON<<12)+(B4\_BWSCON<<16)+(B5\_BWSCON<<20)+(B6\_BWSCON<<24)+( B7\_BWSCON<<28))

DCD ((B0\_Tacs<<13)+(B0\_Tcos<<11)+(B0\_Tacc<<8)+(B0\_Tcoh<<6)+(B0\_Tah<<4)+(B0\_Tacp<<2)+(B0\_PMC)) ;GCS0

DCD ((B1\_Tacs<<13)+(B1\_Tcos<<11)+(B1\_Tacc<<8)+(B1\_Tcoh<<6)+(B1\_Tah<<4)+(B1\_Tacp<<2)+(B1\_PMC)) ;GCS1

DCD ((B2\_Tacs<<13)+(B2\_Tcos<<11)+(B2\_Tacc<<8)+(B2\_Tcoh<<6)+(B2\_Tah<<4)+(B2\_Tacp<<2)+(B2\_PMC)) ;GCS2

DCD ((B3\_Tacs<<13)+(B3\_Tcos<<11)+(B3\_Tacc<<8)+(B3\_Tcoh<<6)+(B3\_Tah<<4)+(B3\_Tacp<<2)+(B3\_PMC)) ;GCS3

DCD ((B4\_Tacs<<13)+(B4\_Tcos<<11)+(B4\_Tacc<<8)+(B4\_Tcoh<<6)+(B4\_Tah<<4)+(B4\_Tacp<<2)+(B4\_PMC)) ;GCS4

DCD ((B5\_Tacs<<13)+(B5\_Tcos<<11)+(B5\_Tacc<<8)+(B5\_Tcoh<<6)+(B5\_Tah<<4)+(B5\_Tacp<<2)+(B5\_PMC)) ;GCS5

DCD ((B6\_MT<<15)+(B6\_Trcd<<2)+(B6\_SCAN)) ;GCS6 DCD ((B7\_MT<<15)+(B7\_Trcd<<2)+(B7\_SCAN)) ;GCS7

DCD ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)

DCD 0x32 ;SCLK power saving mode, BANKSIZE 128M/128M DCD 0x30 ;MRSR6 CL=3clk

DCD 0x30 ;MRSR7 ALIGN

;===============================================================================

; 异常及中断向量表空间; 安装异常或中断处理程序在 bdisr.c 中,isr\_setup()来完成.

;===============================================================================

AREA RamData, DATA, READWRITE

^ \_ISR\_STARTADDRESS ;表示下面数据区从\_ISR\_STARTADDRESS 指定的位置开始 HandleReset \# 4

HandleUndef \# 4

HandleSWI \# 4

<table> 
 <tbody> 
 <tr> 
 <td> HandlePabort </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleDabort </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleReserved </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleIRQ </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleFIQ </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 </tbody> 
</table>

;=============================

; The Interrupt table

;=============================

<table> 
 <tbody> 
 <tr> 
 <td> HandleEINT0 </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleEINT1 </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleEINT2 </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleEINT3 </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleEINT4_7 </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleEINT8_23 </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleRSV6 </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleBATFLT </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleTICK </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleWDT </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleTIMER0 </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleTIMER1 </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleTIMER2 </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleTIMER3 </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleTIMER4 </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleUART2 </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleLCD </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleDMA0 </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleDMA1 </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleDMA2 </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleDMA3 </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleMMC </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleSPI0 </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleUART1 </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleRSV24 </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleUSBD </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleUSBH </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleIIC </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleUART0 </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleSPI1 </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 </tbody> 
</table>

<table> 
 <tbody> 
 <tr> 
 <td> HandleRTC </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 <tr> 
 <td> HandleADC </td> 
 <td> # </td> 
 <td> 4 </td> 
 </tr> 
 </tbody> 
</table>

END

转载于:https://www.cnblogs.com/fanweisheng/p/11103227.html